there are two phases, the shift phase, all flop are chain together and the tester define their values, then the capture phase occurs, the flop are connected as functionnal mode, and one (or more) clock pulse are generated to capture the combinational value between two flops, then the shift phase occurs again to read the capture value and provide the new flop state for the next capture phase.
full scan testing means (I beleived), all flops (as possible) are included in the scan chains, you could exclude some part of the design to do a partial scan, but, how you could covers this part during production test?, it is a trade off between coverage and test time and patterns size.