module differential_signals_test_top (
input CLOCK_IN_P,
input CLOCK_IN_N,
input [15:0] DATA_IN_P,
input [15:0] DATA_IN_P,
//output CLOCK_OUT_P,
//output CLOCK_OUT_N,
output [15:0] DATA_IN_BUFF
)
reg CLOCK_IN;
reg CLOCK_OUT;
reg [15:0] DATA_IN;
reg [15:0] DATA_IN_BUFF;
IBUFDS #(
.CAPACITANCE("DONT_CARE"),
.DIFF_TERM("FALSE"),
.IBUF_DELAY_VALUE("0"),
.IFD_DELAY_VALUE("AUTO"),
.IOSTANDARD("DEFAULT")
) IBUFDS_inst (
.O(CLOCK_IN),
.I(CLOCK_IN_P),
.IB(CLOCK_IN_N)
);
OBUFDS #(
.IOSTANDARD("DEFAULT")
) OBUFDS_inst (
.O(CLOCK_OUT_P),
.OB(CLOCK_OUT_N),
.I(CLOCK_OUT)
);
IBUFDS #(
.CAPACITANCE("DONT_CARE"),
.DIFF_TERM("FALSE"),
.IBUF_DELAY_VALUE("0"),
.IFD_DELAY_VALUE("AUTO"),
.IOSTANDARD("DEFAULT")
) IBUFDS_inst (
.O(DATA_IN),
.I(DATA_IN_P),
.IB(DATA_IN_N)
);
// send out CLOCK_OUT
// latch DATA_IN to ANOTHER BUFFER AT every CLOCK_IN
always @ (posedge CLOCK_IN)
begin
DATA_IN_BUFF <= DATA_IN;
end
endmodule