Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Difference between timing reports Cadence ETS and Synopsys PT

Status
Not open for further replies.

pradyumna333

Newbie level 3
Joined
Nov 16, 2012
Messages
3
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Location
Bangalore,India
Activity points
1,300
Can anyone please tell me the difference between the timing reports generated Cadence ETS and Synopsys PT ??
 

What do you mean by difference ?
 

I want to know which tool gives better timing reports and qor, as I am trying to decide which tool is better for STA signoff
 

I always suppose, Primetime provide golden, trusted signoff solution for timing, signal integrity, power and variation-aware analysis, and it's leading tool in this area.

Timing Analysis in Cadence Encounter
Cadence Timing Engine named CTE (common timing engine). This engine is built in SOC Encounter platform. Besides, CTE is allowed as stand alone tool that is named ETS (Encounter Timing System). So, If you have SoC Encounter license pack you can use CTE through the same Encounter Shell/GUI where you make P&R. Just use 'timeDesign' command for STA and 'optDesign' command for timing optimization.
Look at brief demo about Encounter GUI based STA:
https://www10.edacafe.com/video/display_media.php?link_id_display=26114
 
In a survey in mid 2012, 78% of the designs are signed off with PT.

But, in recent past, ETS is picking up since most of the design companies are moving towards Cadence flow .

Personal opinion: PT is best .
 

Hi,

I worked on PT now I am working on cadence ETS.
Can any one point out what is phase shift in cadence ETS timing reports.

create_clock -name "A" -add -period 1.5 -waveform {0.0 0.75} [get_pins A/CKOUT]
create_clock -name "B" -add -period 100 -waveform {0.0 50} [get_ports B]

Now, there is a path from A to B clock.
Here,timing report shows phase shift of 0.5ns.
In PT it is straight forward.it will show both launch and capture paths
Can any one tell me how that is calculated?

Thanks,
Vid31
 

Both tools are mentioned in the TSMS reference flows, down to 20nm at least.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top