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difference between STA and DTA......

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aswin123

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difference simulation sta

difference between STA and DTA ,which one is preferable,and advantages and disadvantages of STA


at what step we can do STA in vlsi flow........

thanks in advance........
 

DTA: a series of simulation vectors over time are applied during a Chip simulation. Chip simulation calculates the logic values, delay, timing even over time. The simulation will detech the timing falling path by using slack. for late-mode, slack is define as a substraction of required-time to arrive-time. It take a long to run and is very difficult to find out the true cause of failure even (mixed functional and timing problem). It is used for asynchronous logic.

STA: An analysis which work only a timing window. Because, data can't change its values within these windows. It is very complex to learn, but easy to debug and takes less time than to run. STA work best with synchronous logic. Nowaday, all EDA tools use the STA engines for timing viewers.

I will post some useful information later, coming soon! :)

vinh.camau@gmail.com
 

here r some Pdfs hope useful to u
 

STA ,use PrimeTime
DTA, use VCS,modelsim,nc-verilog
 

DTA--> Dynamic timing analysis?? is it correct?
STA--> Static timing analysis ! ..
 

shiv_emf said:
DTA--> Dynamic timing analysis?? is it correct?
STA--> Static timing analysis ! ..

you are right...
 

STA usually is used to test synchronous circuit.
DTA usually is used to test asynchronous circuit.


David
 

DTA is basically simulation which runs on dynamic timing value.
STA is timing optimization of design like synthesis.
 

dta is just testbench simulation, like vcs!
 

deh_fuhrer said:
shiv_emf said:
DTA--> Dynamic timing analysis?? is it correct?
STA--> Static timing analysis ! ..

you are right...

thanks ....
STA checks only timing of netlist .... DTA is actual simulation... checking cud be done by automation or graphical
 

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