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Single Cycle- all operations (fetcf,decode,execute,writeback..)are performed in a single clock cycle.
Multicycle refers to pipelined datapath where all the above operations are performed in multiple clock cycles.
Read Patterson's computer arcchitecture book for more details
Hi,
Actually a single cycle CPU can be designed in many different ways. One is to design it in a pipeline aproach, the instruction will take more than one cycke, but the overal timing for each instruction will be only one. The other way is to create a highly optimized architect for each instruction and make sure that they all run on one cycle only (not so cust effective when it comes to silicon area).
The other, more old fashion way of designing computer architect is by designing a microcode based CPU (like the old 8051) and have a state machine for each instruciton. That way, the size of the silicon will be minimum, but you loose a lot of speed (up to 64 clocks for each instruction).
I know an excellent book in Swedish but havn't read any english book to cover the subject in an easy way.
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