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In an FPGA, LUTs are the basic elements and 16:1, 32:2, 64:1, etc... sized programmable LUTs are common. This actually makes a practical difference when designers try to optimize for minimum gate count without realizing that the design will be mapped onto LUT.
However, from an algorithms perspective, LUT means something that is precomputed and stored -- a ROM. The DDS (direct digital synthesis of the sine/cosine functions) is a popular LUT-based algorithm that uses a LUT larger than 64 elements.
A truth table typically would be a LUT with a 1b output with the potential to be more efficiently implemented by gates.
A table lookup may mean any type of RAM access where data is stored in a table or data structure of any sort. For example, a router may have a "routing table" that maps IP addresses to port numbers. The table isn't know at ASIC/FPGA build time, but is configured later. There may be some algorithm involved in the lookup process. (eg, hashing methods, binary-tree search, B-Tree search, etc...)
These are all just minor variations on a theme, so it is possible that they may be used somewhat interchangeably, with some piece of context determining boolean vs other type data and ram vs rom.
hehehhehe nope and sorry for the way i questioned actually i was doing a project and randomly posted for the differences i got the question from my mentor and i am unable to find the table lookup so i just posted it here