Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
When you define physical exclusive they are not analyzed as being resent in PTSI.
Logical exclusive is nothing but short cut of defining false path between clocks.
Asynchronous clocks is same as logical exclusive.