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dft drc report - after scan insertion

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ee1

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Hi,
i am using DC to insert dft to my design.
i am reading the dft drc report, and there are some sections i don't understand.
"non scan cells without violations" - i have F.F that are not scan f.f, and do not get scan clock & scan reset, but still are under this section,
what does it means?
thanks!
 

My guess would be , non scan cells are already connected as shift registers in the design. So DFTC doesn't have to convert them into scan flops
 

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