signal dff_chain : std_logic_vector ( n - 1 downto 0 ) ;
process ( clock ) is
begin
if reset = '1' then
dff_chain <= ( others => '0' ) ;
elsif rising_edge ( clock ) then
dff_chain ( 0 ) <= input ;
for index in dff_chain ' range
loop
dff_chain ( index + 1 ) <= dff_chain ( index ) ;
end loop ;
end if ;
end process ;
delayed_input <= dff_chain ( dff_chain ' high ) ;
Code:signal dff_chain : std_logic_vector ( n - 1 downto 0 ) ; process ( clock ) is begin if reset = '1' then dff_chain <= ( others => '0' ) ; elsif rising_edge ( clock ) then dff_chain ( 0 ) <= input ; for index in dff_chain ' range loop dff_chain ( index + 1 ) <= dff_chain ( index ) ; end loop ; end if ; end process ; delayed_input <= dff_chain ( dff_chain ' high ) ;
Will it work?
Instead of using a shift register - I want to use the loop statement.
Still looking for a good simulator that can run on a Galaxy S5...a great example of how using a simulator would be a lot quicker than posting the question on the forum and asking
Missed that, thanks.Nope - because your loop variables goes out of range of the array
process ( clock ) is
begin
if reset = '1' then
dff_chain <= ( others => '0' ) ;
elsif rising_edge ( clock ) then
dff_chain ( 0 ) <= input ;
for index in 0 to dff_chain ' length - 2
loop
dff_chain ( index + 1 ) <= dff_chain ( index ) ;
end loop ;
end if ;
end process ;
process ( clock , reset ) is
variable dff_chain : std_logic_vector ( n - 1 dowtno 0 ) ;
begin
if reset = '1' then
dff_chain := ( others => '0' ) ;
elsif rising_edge ( clock ) then
dff_chain ( 0 ) := input ;
for index in 0 to dff_chain ' length - 2
loop
dff_chain ( index + 1 ) := dff_chain ( index ) ;
end loop ;
end if ;
end process ;
Now just for the sake of learning - please help me rewrite the same code using variables instead of signals.
Will it simply be:
Code:process ( clock , reset ) is variable dff_chain : std_logic_vector ( n - 1 dowtno 0 ) ; begin if reset = '1' then dff_chain := ( others => '0' ) ; elsif rising_edge ( clock ) then dff_chain ( 0 ) := input ; for index in 0 to dff_chain ' length - 2 loop dff_chain ( index + 1 ) := dff_chain ( index ) ; end loop ; end if ; end process ;
for index in dff_chain ' length - 2 downto 0 loop
dff_chain(index + 1) := dff_chain (index);
end loop;
dff_chain(0) := input;
Why?It should work if you do the assignments in the reverse.
Why?
What's the difference?
That's what I usually do.To avoid these confusions with assignment order, you'll use signals rather than variables, as in your first post.
That's what I usually do.
It's an educational question.
- - - Updated - - -
Another question:
When is it absolutely necessary to assign a default value to the variable?
Another question:
When is it absolutely necessary to assign a default value to the variable?
If you don't initialize the value and read it - wouldn't it create a latch under some circumstances ?
What do you mean by: "clear name" ?you may also want to avoid using variables for inferring registers, or give them a clear name
Please give a code example of what you mean.This usage of variables adds an order-dependence that normally doesn't exist.
Most (all?) FPGA tools will assign all uninitialized ff's to 0. Simulation doesn't do this, so you should initialize variables (or not initialize them) for the simulation behavior.
What do you mean by: "clear name" ?
Please give a code example of what you mean.
Dont' agree. Altera implements power on reset state according to initialiting statements and default 0 POR state, as long as there are no contradicting logic specifications (e.g. different asynchronous reset). In this case you get a clear warning.This is really only true for Xilinx, Altera used to (<=Cyclone III, <=Stratix IV) stipulated that registers were not guaranteed to power up to a 0 or a 1 regardless of how you specified the register is reset. Altera may have changed this in their more recent parts, but I haven't read their datasheets for quite a few years.
What do you mean by: "clear name" ?
FvM, Disagree all you want, but I'm not going to spend time looking for that paragraph in their own documentation again. I thought it was ridiculous they didn't have a specific power on state for every flip-flop in the device, but it was in their documentation, and the other engineer I showed it to was just as surprised as I was.
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