Determine Precision of DSP application in FPGAs?

Thread starter simon2kk
Start date Mar 28, 2003

Status: Not open for further replies.

Mar 28, 2003

simon2kk

Member level 1

I was reading some DSP books and wonder how floating point algorithm is converted to a fixed point algorithm. I guess the blind conversion will cause the quantization plus lots of overflow problem.
Is there any formal or common method that determines the precision that minimize the errors.
I am sure all dsp engineers have this problem.

Please, give me some pointers.

simon2kk.

Status: Not open for further replies.

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Determine Precision of DSP application in FPGAs?

simon2kk

Member level 1

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