Detecting the beginning of the JTAG programming

[Binome]

Hi,
I have an Altera board with a Cyclone 4 FPGA and a Stellaris LM3S2965 Evaluation Board. I want the FPGA to know when the computer is sending data to the microcontroller to program it. I was trying to detect a transition on tck on the JTAG port of the Stellaris board but it seems there are transitions even when nothing is happening. Can someone tell me why and how I can know when the computer is programming the board ?

 

[ads-ee]

Hi,
I have an Altera board with a Cyclone 4 FPGA and a Stellaris LM3S2965 Evaluation Board. I want the FPGA to know when the computer is sending data to the microcontroller to program it.

I'm not sure I follow this. Are you trying to use the FPGA to detect when the micro is getting data? Or are you trying to use the FPGA to detect when it's configuration is being sent to the micro so the micro can program the FPGA (which makes no sense if the FPGA isn't already programmed).

I was trying to detect a transition on tck on the JTAG port of the Stellaris board but it seems there are transitions even when nothing is happening. Can someone tell me why and how I can know when the computer is programming the board ?

TCK is allowed to toggle continuously see IEEE 1149.1 and 1532 (in system configuration) (neither spec is free). You'll have to monitor the transitions on TMS to determine which TAP state the devices are in along with the TDI data to determine which JTAG commands are being sent to each device on the chain.

Regards

 

[Binome]

It's your first guess:I'm trying to use the FPGA to determine when the micro is getting data from the computer. I'll try to monitor the TMS signal. Thanks.