Dear Suta,
I want to use this circuit in output of the DAC This circuit is drawn in the figure below
The output current of DAC varies between 0 and 20uA with a step size of 100nA(LSB)
The circuit I designed when the input current is between 4uA and 20uA, all transistors operate in the saturation region
the current is less than 4uA. First, the M4 enters the linear region And at lower currents, the transistors M1,M2,M3 enter the sub-threshold region
(W/L 1,2,3,4= 4u/1u)
as you said "when you decrease the current, the transistors will have to enter the subthreshold region."
1-What is the best design for this circuit in which the transistors are in the saturated region at the maximum out put of DAC current range?
the maximum out put of DAC current range that i have designed between 4uA and 20uA.
2-Does the circuit work properly for the low currents that the transistors operate in the substation area?