Designing the PWM Voltage-mode Controller for a DC-DC Boost Converter

[samiran_dam]

Hi all,

I need to design a closed loop DC-DC boost converter.

The specifications are:

I/P Voltage: 1.8 V ± 10%
O/P Voltage: 3.3 V (regulated)
Load Current (Max) = 100 mA

The converter operates in DCM mode (full load range)

L = 5 nH
C = 2 nF
Fsw = 200 MHz

Before I really implement it in transistor level, I want to verify the operation in a higher level of the hierarchy. So I am not really bothered about the feasibility of the implementation (provided that I have considered Fsw = 200MHz). So, please ignore any implementation-related difficulties that I may face. The principle objective of this exercise is to know how to design the PWM controller for a boost power-stage.

I have parameterized veriloga/spice models of an error amplifier, a ramp generator, and a comparator. The boost power-stage consists of a analog switch, a rectifier diode (model), a inductor of 5 nH, output capacitor of 2 nF. The power stage is working fine in open loop.

Now, I am really at a confusion that from where I should start to design the PWM controller to achieve a good regulation. Please help me or suggest some good reference which can guide me step-by-step design of the controller.

Thanking you,

Sam.

 

[picgak]

Here is a DC-DC boost converter which fits your requirements with minimum components https://www.ti.com/lit/ds/symlink/tps61220.pdf

 

[mtwieg]

Why would you base a design at such a high frequency, then suggest you ignore the implementation details? Any reference on circuit design will be useless for such a frequency. Even driving a FET gate at 200MHz with variable duty cycle is quite difficult, especially since you'd likely need to use a HEMT device instead of a MOSFET.