Sep 8, 2012 #1 H harish reddy Newbie level 3 Joined Jul 27, 2012 Messages 3 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,295 i want the procedure for designing the different logic gate, combinational circuits and sequential circuits using only muxes.
i want the procedure for designing the different logic gate, combinational circuits and sequential circuits using only muxes.
Sep 8, 2012 #2 S shaiko Advanced Member level 5 Joined Aug 20, 2011 Messages 2,644 Helped 303 Reputation 608 Reaction score 297 Trophy points 1,363 Activity points 18,302 There's no "procedure"...every case is different What logic gate do you want to model ?
Sep 8, 2012 #3 H harish reddy Newbie level 3 Joined Jul 27, 2012 Messages 3 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,295 shaiko said: There's no "procedure"...every case is different What logic gate do you want to model ? Click to expand... 1.design full adder using 4:1 mux. 2.design 3 bit full adder using only two multiplexers. no additional gates are used. how to think logic to convert this type of circuits.
shaiko said: There's no "procedure"...every case is different What logic gate do you want to model ? Click to expand... 1.design full adder using 4:1 mux. 2.design 3 bit full adder using only two multiplexers. no additional gates are used. how to think logic to convert this type of circuits.
Sep 8, 2012 #4 J jeffrey samuel Advanced Member level 4 Joined Jul 23, 2012 Messages 1,092 Helped 107 Reputation 214 Reaction score 107 Trophy points 1,363 Location chennai,india Activity points 6,373 any case full adder needs oly a single 8:1 mux JUST OR THE OP OF D1,D2,D4,D7 TO GET SUM AND OR D3,D5,D6,D7 to get the carry - - - Updated - - - for other ckts better post the list of sequential ckt for us to help
any case full adder needs oly a single 8:1 mux JUST OR THE OP OF D1,D2,D4,D7 TO GET SUM AND OR D3,D5,D6,D7 to get the carry - - - Updated - - - for other ckts better post the list of sequential ckt for us to help