cmosbjt
Full Member level 5
The process has E, D mode FET
Requirement:
1. Low current < 200uA;
2. Reasaonable fan-out capability > 500 uA for less than 0.1V drop
3. Threshold voltage around Vcc/2
4. Vcc - Vout < 0.2V for logic high
Any reference?
Thanks
Requirement:
1. Low current < 200uA;
2. Reasaonable fan-out capability > 500 uA for less than 0.1V drop
3. Threshold voltage around Vcc/2
4. Vcc - Vout < 0.2V for logic high
Any reference?
Thanks