rajharvijay
Member level 1
Dear friends,
I need serious attentions from ANALOG CIRCUIT DESIGNERS.
I am to design Wide-Band CMOS OPAMP using 2.5V, Which has to drive 50 Ohm and 100 fF Load with given specifications (may need buffer on the output stage to drive the load).
Design must be done in TSMC 0.25u and simulations and Layout should be done by Cadence only.
Input specifications:
Input magnitude: 1 mV
Input frequency: Up to 5 GHz
Current Density: Less than 600 uA/1um2
Expected Results:
Voltage gain: Minimum 15 dB (Must be achieved)
Gain variation: Less than 1 %
Output frequency bandwidth: 0 ~ 5 GHz
Maximum Power dissipation: 40 mW
Please suggest possible architectures.
possible simulation strategy.
I have to work for Lot of things once architecture is fixed.
If you need Original copy of Design Requirements i can give it to you. but please help me.
Please help me to finish this project(CRYING)......
I need serious attentions from ANALOG CIRCUIT DESIGNERS.
I am to design Wide-Band CMOS OPAMP using 2.5V, Which has to drive 50 Ohm and 100 fF Load with given specifications (may need buffer on the output stage to drive the load).
Design must be done in TSMC 0.25u and simulations and Layout should be done by Cadence only.
Input specifications:
Input magnitude: 1 mV
Input frequency: Up to 5 GHz
Current Density: Less than 600 uA/1um2
Expected Results:
Voltage gain: Minimum 15 dB (Must be achieved)
Gain variation: Less than 1 %
Output frequency bandwidth: 0 ~ 5 GHz
Maximum Power dissipation: 40 mW
Please suggest possible architectures.
possible simulation strategy.
I have to work for Lot of things once architecture is fixed.
If you need Original copy of Design Requirements i can give it to you. but please help me.
Please help me to finish this project(CRYING)......