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design of the sink source LVR - request for resources

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vovan76

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sink source LDO

Hi
I'm going to design sink source LVR
Do somebody have some articals or something about this type of regulator
Thanks
 

Re: sink source LDO

What do you mean by sink source LDO? Shunt type regulator?
 

Re: sink source LDO

I need design LDO for 2 inverter chains to chain works between 3.3-1.65 voltage and down chain work 1.65-0V. The LDO should stabiliz 1.65 Voltage .See atached picture
 

If (as the picture implies) the inverters and loads are roughly
equal, and you are "charge recycling" without much skew / loss,
then you might depend onthe roughly-equal charge division,
decouple the "heck" out of the center supply (both to VDD and
VSS), and use an amplifier to only steer a "restoring current"
(net difference, not max(Itop,Ibot)) to maintain the center
rail at a VDD/2 position. How much current do you really
need,to keep those inverters happy? The only "lost" current
is the load shuttle-charge (VDD to load1, load1 to load2,
load 2 to VSS and then the opposite). You can calculate
those charge-slugs from Cload and VDD, and the current
from Fswitch. If it is within the range of some decent-
looking low voltage op amp (or internal op amp design)
then this might be all you need (not a regulator per se, but
producing a regulated result).
 

Sorry for not detiled picture (see new attacment) ,but load of the upper driver chain larger by factor 3 than down chain so there big diffreence between currents.

Pmos gate capcitor is about 200pF
 

Just use a buffer opAmp with a 1:1 voltage divider between 3.3V and VSS, at the non-inverting input of the buffer. I guess this is what dick_freebird indicated above.
 

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