Design of single stage CS amplifier

[niteshtripathi]

I have to design a single stage CS amplifier in which my NMOS is in sub threshold region according to specs that has been given. How to proceed? Please suggest the designing steps of CS amplifier if Gain, UGB, Input Common Mode range, output common mode range, quiescent current, load capacitor etc is given.

 

[Analog.World]

Try Gm/Id methodology .

https://www.google.de/url?sa=t&rct=j&q=&esrc=s&source=web&cd=2&ved=0ahUKEwjRo82ug8jOAhXHChoKHTJKBiYQFggkMAE&url=http%3A%2F%2Fwww.ece.iisc.ernet.in%2F~banerjee%2Fcourse_E3238%2FUpload_files%2FgmoverId1.pdf&usg=AFQjCNHQaTi2zL-aDF3fOJlyQwyTPaPpjw&sig2=q2iTvBAUGn2yOGjmKL7J1Q&bvm=bv.129759880,d.d2s&cad=rja

https://www.google.de/url?sa=t&rct=j&q=&esrc=s&source=web&cd=7&ved=0ahUKEwjRo82ug8jOAhXHChoKHTJKBiYQFghCMAY&url=http%3A%2F%2Fwww.ece.usu.edu%2Fgrad%2Freports_theses_disseratations%2F2010%2FRao_Arun_J%2Fthesis.pdf&usg=AFQjCNE-Yt2gHHzMIMKOJOW5m-I_Rkg09A&sig2=XT5Yzc5QUYp9jjukICcf0A&bvm=bv.129759880,d.d2s&cad=rja