design chart (gm/Id) on the wide swing current mirror ckt

[hdmi]

current mirror +ckt

The attached circuit is a bias circuit for a folded cascode CMOS Opamp, I was applying the gm/Id methodology and design charts to do the transistor sizing. The process technology is 0.18um and the supply voltages VDD=0.9v, VSS=-0.9V.

While M12 and M17 are alwasy in sat, and M15 also seems to be easy to be made in Saturation, I don't seem to be able to make M13, M14 and M16 all operate in Saturation regions, and the design charts I pre-characterized doesn't seem to help much either. Could anyone shed some light on the rational way when sizing the transistors so that all devices will be in saturation regions? Also can anyone explain what could go wrong from gm/Id methodology and the design charts, and what can I do when I don't get what I expect from the design charts?

Thanks in advance.

P.S. I was using L=0.5um for all transistors and I was making gm/Id = 4 except for M15 which I chose the gm/Id=5.

 

[edge_tv]

First I don’t understand why M14 should only has a gm/Id= 4, because it is cascode and I would expected a much higher gm/Id like 12 or 14. I think that’s the problem, for gm/Id=4 you need a very large Vov and this can’t be delivered from M12.
The coscod bulk connection is also a problem usally people forget about that, makes Vth higher and hence the design charts are wrong.

 

[ashish_chauhan]

Re: design chart (gm/Id) on the wide swing current mirror ck

First I don’t understand why M14 should only has a gm/Id= 4, because it is cascode and I would expected a much higher gm/Id like 12 or 14. I think that’s the problem, for gm/Id=4 you need a very large Vov and this can’t be delivered from M12.
The coscod bulk connection is also a problem usally people forget about that, makes Vth higher and hence the design charts are wrong.

here cascode bulk can be taken care of... its a pmos and you can tie the source and bulk in a vanilla CMOS process..

 

[hdmi]

Re: design chart (gm/Id) on the wide swing current mirror ck

I think a much bigger issue with the gm/Id methodology, as some already pointed out in this forum, is that it wasn't able to predict gds, and Vds (not Vdsat) well. Take for example, the voltages at node 13 and node 12 are to bias the folded cascode amplifier (not shown), therefore the voltages at node 12 & 13 are fixed to certain values, in order to achieve this goal, I will have to know gds(M12) and gds(M15) [or VDS(12) and VDS(15)] in order to calculate the divided voltage at node 13. I just don't know how gm/id can help me solve this issue, and I don't know how to extend this methodology to cover this gds and vds issues. If anyone can shed some light, I will be very much appreciated.

Thanks,

 

[ashish_chauhan]

Re: design chart (gm/Id) on the wide swing current mirror ck

Hi HDMI,

I agree with your point but not fully...

For any technology if you can get a rough estimate on early voltage... then you can easily extend the gm/id method to the biasing of your conerned circuit. else you can create separate gds/id charts with respe to vds.

I am myself not an efficient uers of gm/id method but steps I suggested put me very close to my expected performance of a circuit . rest can be taken care of by minor tweaking.

good luck