Delta Sigma ADC and non uniform Sampling

[mordak]

Hi,

I was wondering if for delta sigma ADCs it would be possible to use non-uniform sampling (under sampling) for frequencies higher than the maximum bandwidth of the ADC. For example, assuming a delta sigma ADC has certain resolution for an input frequency up to X Hz, then for a signal with 2X Hz frequency one uses non-uniform sampling to convert the signal. It is quite normal in Nyquist rate ADCs, but I think it might not be doable with oversampling ADCs.

Any help is appreciated!

 

[KlausST]

Hi,

About "non uniform":
Just to be sure. With a delta sigma ADC you need a fixed and stable clock. Don't try to start a converdion "on demand".

To your question:
A delta sigma adc usually is not useful for undersampling applications. The digital output depends on the chip internals.
Therefore it gives only one solution to your question. Read the datasheet.
Especially the filter characteristics. You should find charts wit frequency (maybe retated to sample frequency or data output rate) in horizontal and relative output amplitude on the vertical axis.
Often you will find that the amplitude is very flat at about 0dB to near half the data output rate an then it filters away all upper frequencies.

Klaus

 

[mordak]

Hi,

About "non uniform":
Just to be sure. With a delta sigma ADC you need a fixed and stable clock. Don't try to start a converdion "on demand".

To your question:
A delta sigma adc usually is not useful for undersampling applications. The digital output depends on the chip internals.
Therefore it gives only one solution to your question. Read the datasheet.
Especially the filter characteristics. You should find charts wit frequency (maybe retated to sample frequency or data output rate) in horizontal and relative output amplitude on the vertical axis.
Often you will find that the amplitude is very flat at about 0dB to near half the data output rate an then it filters away all upper frequencies.

Klaus

Thanks for your comment! Actually I didn't think about using an off-the-shelf ADC, I was thinking about designing one. So filters and other stuff wouldn't be any problem. About the amplitude being flat up to the half of data rate, that wouldn't be a problem too since with non-uniform sampling your ADC would see the exact same frequency even for higher frequencies (in the discrete-time version). Say if for X Hz you had 10 samples per period, for the 2X Hz you would have 5 samples per period and using two periods (same amount of time as the X Hz signal) you can have 10 samples. But my concern was that since the sampling clock would be shifted by some amount for the second period in the above example, then delta sigma would be messed up, I'm not sure if my conclusion is correct.

 

[KlausST]

Hi,

designing your own:
Then you know that you need a delta sigma modulator, a digital low pass filter and a decimation filter.

Every part has it´s influence on frequency response.
Since you build it yoursef you can adjusta on frequency response.
Are you aware of the latency of a delta sigma adc?

ince the sampling clock would be shifted by some amount for the second period in the above example

I´m not sure what you mean.
Just to confess: A delta sigma adc needs a continous, fixed and stable clock. otherwise the result is undefined.

Klaus