KP
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Ground Bounce: defines a condition when a device's output {really a number of outputs} switches from High to Low
and causes a voltage change on other pins.The problem is cause by the large current flow through the ground pin which
develops a voltage drop over the lead inductance.This voltage drop on the ground line creates two main problems;
first it rises the chip off ground [0 volts] potential which increases
the devices input threshold level, and increases the voltage level on an output pin which is not switching.
Because a quiet output is effected by the other switching outputs, this is also called Simultaneous Switching Noise.
It's really a question of loss of noise margin which is listed below. The faster the slew rate of the logic family,
the worse the problem becomes. With glue Logic, the ground pins may have been moved around to reduce the inductance.
Using a surface mount device instead of a Through Hole will reduce the lead inductance.
For FPGA's with hundreds of possible output pins the situation may change, and it's more up to the designer.
Start a noise budget to determine if the ground bounce [rise in ground potential] effects the design.
The voltage developed over ground lead is proportional to the rate of change in current, so the faster the logic family
the worse the problem becomes: V = L * [di/dt]. The more outputs switch at the same time, the larger the current value,
and the greater voltage bounce. Also occur when the outputs switch from a 0 to a 1 but to a much smaller degree.
Series termination of the line is one method of reducing ground bounce. Series termination resistors slow the rate of
change of the output, and so reduce the instantaneous current on the ground line.Also Resistor Pull-Ups on the line cause
the ground bounce voltage to increase. The pull-up resistor allows the load capacitor to charge to it's flow value, so as
the line switches maximum current is delivered back to the driver. Eliminate pull-up resistors on devices with an issue,
use pull-down resistors or series resistors if possible. Reducing the loading on the driver also reduces ground bounce.
This article is adopted from
http://www.interfacebus.com/Logic_Noise_and_EMI_Issues.html
If any experts have better comments on "Ground Bounce" pls share here.
and causes a voltage change on other pins.The problem is cause by the large current flow through the ground pin which
develops a voltage drop over the lead inductance.This voltage drop on the ground line creates two main problems;
first it rises the chip off ground [0 volts] potential which increases
the devices input threshold level, and increases the voltage level on an output pin which is not switching.
Because a quiet output is effected by the other switching outputs, this is also called Simultaneous Switching Noise.
It's really a question of loss of noise margin which is listed below. The faster the slew rate of the logic family,
the worse the problem becomes. With glue Logic, the ground pins may have been moved around to reduce the inductance.
Using a surface mount device instead of a Through Hole will reduce the lead inductance.
For FPGA's with hundreds of possible output pins the situation may change, and it's more up to the designer.
Start a noise budget to determine if the ground bounce [rise in ground potential] effects the design.
The voltage developed over ground lead is proportional to the rate of change in current, so the faster the logic family
the worse the problem becomes: V = L * [di/dt]. The more outputs switch at the same time, the larger the current value,
and the greater voltage bounce. Also occur when the outputs switch from a 0 to a 1 but to a much smaller degree.
Series termination of the line is one method of reducing ground bounce. Series termination resistors slow the rate of
change of the output, and so reduce the instantaneous current on the ground line.Also Resistor Pull-Ups on the line cause
the ground bounce voltage to increase. The pull-up resistor allows the load capacitor to charge to it's flow value, so as
the line switches maximum current is delivered back to the driver. Eliminate pull-up resistors on devices with an issue,
use pull-down resistors or series resistors if possible. Reducing the loading on the driver also reduces ground bounce.
This article is adopted from
http://www.interfacebus.com/Logic_Noise_and_EMI_Issues.html
If any experts have better comments on "Ground Bounce" pls share here.