can you please tell me how to define a port list in cadence? I've written a small verilog decoder program in cadence, but without any success, since the port list fails. thanks in advance.
can you please tell me how to define a port list in cadence? I've written a small verilog decoder program in cadence, but without any success, since the port list fails. thanks in advance.
Hi,
You should define the port information in verilog code with input/output/inout only. You should post detail error info or your RTL code to get more answer.
There is not a "Cadence" tool: Cadence is a vendor. Cadence make lots of different tools: which one are you trying to use? What is the command you type to start it?
I suspect that you may mean that you have created a verilog view in Design Framework 2 and the tool is reporting that it doesn't match with the symbol view: is that right? Maybe you are not specifying the bit widths of the ports correctly.