DDR3 RAM usage in EDK

[spman]

Hi

What is the role of a DDR3 RAM in EDK? When we declare a variable (in SDK), does it being saved in the DDR3 RAM or in BRAMs? If the second is correct, so how is it possible to access to DDR3 RAM?

 

[syedshan]

for DDR3 RAM you need the SDRAM (DDR3 RaM) controller. You have Xilinx MIG(memory Interface Generator) for that purpose.
Google how to use DDR3 with xilinx fpgas and you will get an idea

 

[spman]

I have used DDR3 RAM previously in a design (without EDK) and I am familier with MIG.

But now I want to know about MPMC (multi port memory controller) in EDK. Because SDRAMs are used in EDK by MPMC (not MIG). Actually I want to bring my design to EDK and i'm confused with SDRAM usage in EDK.

Thanks

 

[syedshan]

oh...
well in that case you know more than I do since I am currently doing the MIG thing...
Dont know about this stuff u talking about