DDR2 controller, MIG for virtex5 design

[hastidot]

Hi all
I'm using MIG as DDR2 controller for virtex5 FPGA. I'm now studying the MIG user guide. But i'm confused what is the difference between Read Data Strobe(DQS) and Read Data (DQ). I'm thankful for any help.

 

[rhaynes]

For DDR2 there is a "clock" for each 8 bits on the RAM. The DQS is an input during write and is used to clock the data into the RAM. DQS becomes an output during read and is used to clock the read data from the RAM into the external interface. Wikipedia has a pretty good explanation of DDR2



Ray

 

[voho]

Before to use mig you need to choose witch memory do you want to use.
For example DDR2 by micron and look at the data sheet about DQ an DQS.

Dq is the data and DQs is strobe associed to this Data.

more info at:
https://www.xilinx.com/support/documentation/ip_documentation/ug086.pdf
XAPP858 - High-Performance DDR2 SDRAM Interface Data Capture with Virtex-5 FPGAs

good luck