DC: Defining constrains for the design

Status
Not open for further replies.
Joined
Sep 3, 2007
Messages
848
Helped
66
Reputation
132
Reaction score
16
Trophy points
1,298
Activity points
0
Hi,

I am a new user of DC and I have some question about setting constraints. Can some one reply to these following questions ?

1- What should be the input delays, set up an hold time to set as constraints in DC for a dff in a 65 nm technology ?
2- How to define these constrains for other components such as Latches, counters, ..
3- What is the range of the maximum frequency we can reach ?

Thanks,
 

Status
Not open for further replies.
Cookies are required to use this site. You must accept them to continue using the site. Learn more…