lijo911
Newbie level 4
HI.........one of my friend is doin project on interconnects......His design has 3 modules......When he s using only
the 1st 2 modules, the output at every point is comin' quite perfectly....... Now when he simply inserts the 3rd
module into the design, which is driven by the 2nd module, the output at every module is gone.........even at the
first module which doesnt ve any direct connection to 3rd module.........Then v tried removing all the connections
to the 3rd module........still the same problem............so v then removed the VDD and GND of the 3rd module alone
and everything s fine for 1st and 2nd module........... So v think the problem could be because the DC convergence
algorithm is not able to find a solution with the 3rd module in the picture....... V tried giving a separate VDD and
GND for 3rd module alone....... still problem exits........So is the problem becoz Spectre simulator is not able to
converge the DC operating points??......Plz reply asap....... Thanx in advance.........
the 1st 2 modules, the output at every point is comin' quite perfectly....... Now when he simply inserts the 3rd
module into the design, which is driven by the 2nd module, the output at every module is gone.........even at the
first module which doesnt ve any direct connection to 3rd module.........Then v tried removing all the connections
to the 3rd module........still the same problem............so v then removed the VDD and GND of the 3rd module alone
and everything s fine for 1st and 2nd module........... So v think the problem could be because the DC convergence
algorithm is not able to find a solution with the 3rd module in the picture....... V tried giving a separate VDD and
GND for 3rd module alone....... still problem exits........So is the problem becoz Spectre simulator is not able to
converge the DC operating points??......Plz reply asap....... Thanx in advance.........
Last edited by a moderator: