When the input is floating, what's the voltage there? 0? VDD? You don't know, and neither does your FPGA. The correct way to have done this was to have a pull-down resistor connected to one side of the switch and the FPGA pin, and the other side of the switch connected to VDD. That way, when the switch is open, the input is pulled low, and when the switch is closed, it's pulled high.
But since you DIDN'T do it that way, you'll need to add a pull-down. I haven't used the Cyclone IV, but most FPGAs have the capability of enabling an internal pull-down. That should solve your problem.