current source load !!

[biolycans]

Hi all,

I have a question related to the current source load. For example if I have a common source amplifier with a Resistor Rd as a load, if My transistor NMOS is in the saturation mode then the differences between the Rd and resistance of the NMOS is huge because the transistor is acting like a current source so its impedance is huge and the voltage drop on it will be bigger than the voltage drop in Rd,

But in many books, I found that the common source has a current source as a load (this a PMOS), why ?

And in the differential amplifier, in many books I read that the load of this circuit is current. Why ?

If I see this like a voltage divider, I will have a resistor of the PMOS and the resistor of the NMOS and those resistances will be of the same order of value, so my voltage drop on boths transistor will be similar , so I don ´t know the reason I use this configuration.

regards

joaquin

 

[LvW]

Biolycans,

in all of your considerations you are mixing STATIC resistances and DYNAMIC resistances. For a good understanding of transistor functions it is very important to note that each transistor is a non-linear device.
And in those cases it is always necessary to discriminate between differential (dynamic) and static resistances.

 

[dick_freebird]

A load characteristic can simply be an arbitrary choice,
made for convenience of analysis or tradition.

 

[LvW]

Biolycans,
in all of your considerations you are mixing STATIC resistances and DYNAMIC resistances. For a good understanding of transistor functions it is very important to note that each transistor is a non-linear device.
And in those cases it is always necessary to discriminate between differential (dynamic) and static resistances.

For clarfication, here comes a simple example:
For Ic=1mA and Vce=5V you could calculate a ratio Vce/Ic=5kohms.
However, you must NOT interpret this result as an ohmic resistor because for another Vce value the current remains (nearly) the same because Ic is determined by the control voltage Vbe and NOT by Vce (as would be the case for an ohmic resistor).

 

[biolycans]

For clarfication, here comes a simple example:
For Ic=1mA and Vce=5V you could calculate a ratio Vce/Ic=5kohms.
However, you must NOT interpret this result as an ohmic resistor because for another Vce value the current remains (nearly) the same because Ic is determined by the control voltage Vbe and NOT by Vce (as would be the case for an ohmic resistor).

Hi,

Related to what you told me, if my transistor is in saturation, the current will be approximately constant, so if I increase Vds, the current will the same (ideally). I know that the drain current through the transistor is controlled by Vgs. If I increase Vgs, then Id will increase too.

But If I have a drop voltage Vds across the transistor (NMOS), and I have a current Id. How can I measure the resistance that produces that drop voltage in this case ? The NMOS for this case is in saturation. I am asking you this because in many books I read that the transistor should be in saturation so they act like an amplifier. When the transistor is in saturation, the impedance is really hight so the drop voltage across it is bigger than in a resistor (for example in a common source amplifier NMOS with a resistor Rd as a load).

Regards !

Joaquin

 

[LvW]

Joaquin,
at first - sorry my example was for a BJT while you were speaking about MOSFET`s. But you were able to transfer my answer to MOSFETs, fine.
Now to your question:
I am afraid your understanding needs correction. There is no "drop voltage " across the NMOS device. That means: The voltage Vds is not CAUSED by the current Id (as a voltage "drop"). Rather, the voltage across D and S is the driving quantity which allows the current Id.
Quote: "When the transistor is in saturation, the impedance is really hight".
Which "impedance" are you speaking off? The resistance that is "really high" is the DIFFERENTIAL resistance rds=vds/id (note: small letters r in contrast to R for a static resistance).
And because this resistance rds is large if compared with the external ohmic resistor Rd we can treat the MOS device as a current source!
Does this help?

 

[biolycans]

Joaquin,
at first - sorry my example was for a BJT while you were speaking about MOSFET`s. But you were able to transfer my answer to MOSFETs, fine.
Now to your question:
I am afraid your understanding needs correction. There is no "drop voltage " across the NMOS device. That means: The voltage Vds is not CAUSED by the current Id (as a voltage "drop"). Rather, the voltage across D and S is the driving quantity which allows the current Id.
Quote: "When the transistor is in saturation, the impedance is really hight".
Which "impedance" are you speaking off? The resistance that is "really high" is the DIFFERENTIAL resistance rds=vds/id (note: small letters r in contrast to R for a static resistance).
And because this resistance rds is large if compared with the external ohmic resistor Rd we can treat the MOS device as a current source!
Does this help?

Hi again !

Thank you for your response.

When my transistor is working in the triode region, the relation between Id and Vds is: rds = Vds / Id, so in this case the transistor is working like a resistor controlled by tension (Vgs). In this case the drop voltage across the NMOS is produced by the current Id. Is this correct ?

When my transistor is working in the saturation region, the current is approximately constant (ideally) but in the reality the Id has a relation with Vds. So the slope of the current vs Vds in saturation is 1/ro, where ro is the drain output impedance, which is in parallel with the differential resistance rds. Am I correct ?

Another thing is when you talk about static and dynamic resistances, what I understand is that the static resistance corresponds to the bias condition (polarization) and the dynamic resistances are when I apply a small signal in the NMOS for example. Am I correct ?

Sorry if I made many questions, but I want to understand really well this concepts.

Best Regards,

Joaquin

 

[LvW]

My answers are in green within your post.

When my transistor is working in the triode region, the relation between Id and Vds is: rds = Vds / Id, so in this case the transistor is working like a resistor controlled by tension (Vgs).

Yes
In this case the drop voltage across the NMOS is produced by the current Id. Is this correct ?

If you have two conventional resistors in series, is the voltage across one resistor caused by the driving voltage or by the current through the device?

When my transistor is working in the saturation region, the current is approximately constant (ideally) but in the reality the Id has a relation with Vds. So the slope of the current vs Vds in saturation is 1/ro, where ro is the drain output impedance, which is in parallel with the differential resistance rds. Am I correct ?

Yes, I think so.

Another thing is when you talk about static and dynamic resistances, what I understand is that the static resistance corresponds to the bias condition (polarization) and the dynamic resistances are when I apply a small signal in the NMOS for example. Am I correct ?

Yes.

 

[biolycans]

My answers are in green within your post.

Related to what I told you in the last post, in the small signal analysis, only appears ro (modulation channel). Where is the differential resistance rds you told me ?

joaquin

 

[LvW]

Related to what I told you in the last post, in the small signal analysis, only appears ro (modulation channel). Where is the differential resistance rds you told me ?
joaquin

At first, please explain the meaning of the resistance you call ro. Not identical to rds?

 

[biolycans]

At first, please explain the meaning of the resistance you call ro. Not identical to rds?

When I do the small signal analysis of a common source NMOS with a resistance Rd as a load, I have the current source gm * Vgs in parallel with the resistance Rd and a resistance ro. In many books I found that ro is the drain output resistance, the value 1/ro is the slope of the plot Id vs Vds in saturation. This ro represents the channel modulation of the NMOS in saturation.

I know that in the triode region, the resistance drain to source is equal to Vds / Id.

In saturation what is the value of this high rds. because in many books I found that ro is different to rds. This is the link where I found this:

https://www.ittc.ku.edu/~jstiles/312/handouts/Drain Output Resistance.pdf

Regards,

Joaquin

 

[LvW]

I suppse, now I know the background of your questions.

Here is my - somewhat general - answer:
I recommend to use any abbreviations - in particular for explaining their meanings - in conjunction with some explaining words only.
If I did understand the contents of your pdf attachement correctly, they use the term ro for the triode region only.
This can be done - why not? However, only with associated explanations.
For my opinion and according to my knowledge, there are other sources which use the term rds for ALL regions (triode and saturation).
This can be done, of course, because in both cases it is the resistance between D and S - however, in one case it is an ohmic resistor rds=Rds and in the other case it is a differential quantity only.
That means: In the refrenced paper they use an abbreviation ro which is NOT equal to rds, in other papers and books they do not use ro at all.

Remark:As another comment to the paper you have shown, I think it is rather uncommon to apply the term "Early voltage" also to FET´s. According to my knowledge this reserved exclusively to bipolar transistors only.
Thus, do not believe everything which is written down.

 

[biolycans]

I suppse, now I know the background of your questions.

Here is my - somewhat general - answer:
I recommend to use any abbreviations - in particular for explaining their meanings - in conjunction with some explaining words only.
If I did understand the contents of your pdf attachement correctly, they use the term ro for the triode region only.
This can be done - why not? However, only with associated explanations.
For my opinion and according to my knowledge, there are other sources which use the term rds for ALL regions (triode and saturation).
This can be done, of course, because in both cases it is the resistance between D and S - however, in one case it is an ohmic resistor rds=Rds and in the other case it is a differential quantity only.
That means: In the refrenced paper they use an abbreviation ro which is NOT equal to rds, in other papers and books they do not use ro at all.

Remark:As another comment to the paper you have shown, I think it is rather uncommon to apply the term "Early voltage" also to FET´s. According to my knowledge this reserved exclusively to bipolar transistors only.
Thus, do not believe everything which is written down.

Hi,

okey so in the triode region the resistance between drain and source is rds. In this case This resistance has a relation with the drain current and the drain source voltage. In the saturation region, the small signal analysis I watched in many books has a resistance in parallel with the current source gm * Vgs equal to ro (this ro represent the channel modulation), so what it make me feel confuse is: is this resistance ro the resistance between drain and source in the saturation ?

Another thing make feel confuse is that the value of gm. This value represents the efficient of the mosfet, I mean the conversion of voltage to current. I though that the gm was equal to 1/resistance.

joaquin

 

[LvW]

okey so in the triode region the resistance between drain and source is rds. In this case This resistance has a relation with the drain current and the drain source voltage. In the saturation region, the small signal analysis I watched in many books has a resistance in parallel with the current source gm * Vgs equal to ro (this ro represent the channel modulation), so what it make me feel confuse is: is this resistance ro the resistance between drain and source in the saturation ?

No - it is not the resistance BETWEEN drain and source. Rather, it is a differential (dynamic) resistance in parallel with the current source Vgs*gm, that indeed is between D and S. But this element appears in the small signal equivalent circuit diagram only. Try to avoid thinking in resistor terms only! It is caused - as you have correctly mentioned by channel length modulation and can be modeled as a resitor, but it is not a resistice effect (physically spoken).

Another thing make feel confuse is that the value of gm. This value represents the efficient of the mosfet, I mean the conversion of voltage to current. I though that the gm was equal to 1/resistance.

Again NO ! It is a transconductance which is measurted in A/V=1/Ohm. However, it is not a resistive effect and it should not be interpreted as 1/Ohm. (But I know, in some written articles - or even in some books - it appears in equation sometimes as an "intrinsic resistance" Ri=1/gm. But physically this is NONSENSE and does not help at all to understand transistor operation. (Remember: Some fellows can think only in terms of resistance and Ohms).

 

[biolycans]

No - it is not the resistance BETWEEN drain and source. Rather, it is a differential (dynamic) resistance in parallel with the current source Vgs*gm, that indeed is between D and S. But this element appears in the small signal equivalent circuit diagram only. Try to avoid thinking in resistor terms only! It is caused - as you have correctly mentioned by channel length modulation and can be modeled as a resitor, but it is not a resistice effect (physically spoken).

Again NO ! It is a transconductance which is measurted in A/V=1/Ohm. However, it is not a resistive effect and it should not be interpreted as 1/Ohm. (But I know, in some written articles - or even in some books - it appears in equation sometimes as an "intrinsic resistance" Ri=1/gm. But physically this is NONSENSE and does not help at all to understand transistor operation. (Remember: Some fellows can think only in terms of resistance and Ohms).

Hi,

Thank you for your response, I understand what you told me.

Another thing I want to ask you if you don t have any problem is why in the saturation region the mosfet act like as an amplifier ? Let me explain if I am correct. If I have a common source amplifier with a resistance as a load and the transistor is a NMOS, if this transistor is in the saturation condition, then the drop voltage across the resistor is much much less than in the NMOS. If this transistor is in the triode region, then the resistance rds will be less so the drop voltage across it will be less. Is this the reason ?

If I change the resistor Rd with a current source, in the gain voltage equation the gain increase because I have the paralle between the r1 and r2 of both transistor. So the drop voltage in each transistor will be more divided but the gain will be bigger. That is the reason I change the load with a curren source (PMOS)

Finally I found a video in youtube that compare the PMOS common source with a resistor Rd as a load with a NMOS common source amplifier with a resistor Rd as a load too. The video say that the PMOS common source amplifier has a bigger output swing voltage than the NMOS common source amplifier. Do you know why ?

Thank you again for your help !! I really appreciate how you spend your time answer the questions.

Joaquin

 

[LvW]

.. why in the saturation region the mosfet act like as an amplifier ? Let me explain if I am correct. If I have a common source amplifier with a resistance as a load and the transistor is a NMOS, if this transistor is in the saturation condition, then the drop voltage across the resistor is much much less than in the NMOS. If this transistor is in the triode region, then the resistance rds will be less so the drop voltage across it will be less. Is this the reason ?

No, not at all. In one of my posts (post#6) I have commented already your term "drop voltage". The FET alone does not act as an amplifier - the device transfers input voltage CHANGES into output current CHANGES - that`s all. This is described by the transconductance gm=delta Id/delta Vgs. These variations of Id produce a corresponding voltage across the external resistor Rd. Because of the saturation characteristics (small slope of the Id vs Vds characteristic) the transistor acts as a current source with an internal resistance (modeled by a parallel dynamic resistance rds) that is much larger than Rd. This is the background of the amplifying properties of the transistor.

If I change the resistor Rd with a current source, in the gain voltage equation the gain increase because I have the paralle between the r1 and r2 of both transistor. So the drop voltage in each transistor will be more divided but the gain will be bigger. That is the reason I change the load with a curren source (PMOS)

Again, do not use symbols without explanation. What do you mean with r1 and r2? I suppose rds1 and rds2 ?
The explanation is simple: The ohmic resistor Rd (typically some kohms) is replaced by a much larger differential resistor rds2. Thus, the voltage across this "resistor" is larger if compared with the Rd case. Therefore, the gain is increased.

Finally I found a video in youtube that compare the PMOS common source with a resistor Rd as a load with a NMOS common source amplifier with a resistor Rd as a load too. The video say that the PMOS common source amplifier has a bigger output swing voltage than the NMOS common source amplifier. Do you know why ?

No - I even do not know if this statement is correct. I don`t know which transistor types are ther basis of this comparison. Sounds a bit weird.