ad 1) if some of transistor consumes almost all Vdd it means, there is no current in this branch and such transistor is probably cuted-off (or guy below).
ad 2) In your 2µA branches you have (looking from left respectively): diode+DC shifter providing Vds for current sources and diode in other branch. It means that on left branch PMOSes needs at least Vth+2·Vdssat which can be ca 600mV, while on the right Vth+Vdssat so ca 500mV. You can relax it by changing flavor of transistor (lower Vth) or by biasing them in lower inversion region (by increase W/L ratio).
To ensure proper biasing in such HSCM, ensure enough voltage for current sources (fets on the rails). It mean, that triode biased guys in cascode biasing branches, should has Vds>Vdssat+some margin (this voltage is next copied by cascode biasing as a Vds for current sources). It mean that for moderate inversion it should be ca 120mV in room temperature, while in strong inversion ca 250mV. If you are not sure how to achieve it, start by replacing this triode connected level shifters by dc voltage sources with 150mV dc voltage to ensure at least 150mV of Vds for current sources. When You find good W/L for cascodes and current sources (mean all will be saturated), then change ideal sources on transistor and start with sthing like W/4L of current sources and then trimm this in parametric sweep if needed.
//edit:
You can also try to start with ideal current source to achieve reasonable voltage drop on PMOS diodes in these 2µA branches.