brxnet
Newbie level 3
Hi,
I am new to analog layout ,I am working in Cadence.
I want to make matching layout for current mirror consisted of two identical mosfets, 240/0.7um.I am planing to make 4 mosfets of 60/0.7um of each mosfet in mirror,and then to use 1D common centroid. In Art of analog layout from Alan Hastings i found interdigitalized pattern
dAsBdBsAdAsBdBsAd (mosfets are called A and B,d-drain,s-source)
I looked in lots of books and tutorials on the net,this pattern is widely used,in Art of analog layout is also mentioned as one of the best for interdigitization.But since there isn't same number of drains for A and B mosfet(A has 4 drains and B 3),then I guess thas this is good matching for DC,but not for AC since their parasitic capacitance are quite different with this patter.Am I right?
With what patter can I get better matching of parasitic capacitances,can I use
dAsBd dBsAdAsBd dBsAd
It is also from Alan Hastings where he mentions that this patter is with smaller compactness then previous,but with gaps between mosfets B enables me to get same number of drains.But if I do that,how wide should the gaps be to get identical parasitic capacitances, what about the dummies,should I put them on the start and in the end of the pattern,and in gaps also or what?
Is there some better pattern which i could use?
I know that 2D common centroid is supperior,
dAsBdBsAd
dBsAdAsBs
this pattern enables me to have same number of drains,but I am afraid that because of more complicated routing,i wont be able to make symmetrical wire routing,how much will that affect matching?
Would appreciate your thoughts..Thanks!
I am new to analog layout ,I am working in Cadence.
I want to make matching layout for current mirror consisted of two identical mosfets, 240/0.7um.I am planing to make 4 mosfets of 60/0.7um of each mosfet in mirror,and then to use 1D common centroid. In Art of analog layout from Alan Hastings i found interdigitalized pattern
dAsBdBsAdAsBdBsAd (mosfets are called A and B,d-drain,s-source)
I looked in lots of books and tutorials on the net,this pattern is widely used,in Art of analog layout is also mentioned as one of the best for interdigitization.But since there isn't same number of drains for A and B mosfet(A has 4 drains and B 3),then I guess thas this is good matching for DC,but not for AC since their parasitic capacitance are quite different with this patter.Am I right?
With what patter can I get better matching of parasitic capacitances,can I use
dAsBd dBsAdAsBd dBsAd
It is also from Alan Hastings where he mentions that this patter is with smaller compactness then previous,but with gaps between mosfets B enables me to get same number of drains.But if I do that,how wide should the gaps be to get identical parasitic capacitances, what about the dummies,should I put them on the start and in the end of the pattern,and in gaps also or what?
Is there some better pattern which i could use?
I know that 2D common centroid is supperior,
dAsBdBsAd
dBsAdAsBs
this pattern enables me to have same number of drains,but I am afraid that because of more complicated routing,i wont be able to make symmetrical wire routing,how much will that affect matching?
Would appreciate your thoughts..Thanks!