Aug 22, 2019 #1 P pragash Advanced Member level 2 Joined Jul 4, 2005 Messages 512 Helped 64 Reputation 128 Reaction score 59 Trophy points 1,308 Location Oakland Activity points 4,940 I know that CST can simulate PCB layout to predict EMC/EMI issue which will the product fail radiated spurious emission test at certification. can anyone tell me how to do it? any document with simulation procedure is welcomed.
I know that CST can simulate PCB layout to predict EMC/EMI issue which will the product fail radiated spurious emission test at certification. can anyone tell me how to do it? any document with simulation procedure is welcomed.