Sorry Biff, I guess I was agreeing with you that the steep slope of Xtal filters can add phase noise to XO sources and I was suggesting low Q VCO PLL instead.
HP author wrote here
http://www.hparchive.com/seminar_notes/a-117.pdf and I quote his conclusions.
HOW TO MINIMIZE PHASE NOISE
• maximize the Q (with constant device noise source).
• maximize the signal power vs noise power.
• drive the crystal (series) with a controlled, low impedance.
• drive the crystal with a linear amplifier (don't limit in the stage that drives the resonator).
• use a quiet resonator, the oscillator frequency will follow the resonator frequency fluctuations.
• carefully control limiting mechanism so as to not introduce am noise.
• use a quiet device.
• take output power after the resonator if possible to filter noise at large offset frequencies.
• optimize the noise where it is needed, especially consider close in noise vs. large offset noise requirements.
• in a filter application, consider reducing resonator Q if wider bandwidth is acceptable.
I know from my personal experience. the most stable clocks in the world (Rubidium) also have the very poor phase noise, so they phase lock (PLL) a VCXO to this source for low phase noise.