counter with similar states

[sgharagoz]

Hi there,

How do you design a counter that has a similar state such as, 1100,0110,0011,0110,1100,......

Thanks

 

[barry]

That looks to me like a left-right shift register. Shift right twice, shift left twice, repeat.


It certainly doesn't make a lot of sense, though. You've only got three states, but you are using 4 bits (you could use 2).

You COULD just make a divide-by-3 counter, and decode the counter outputs to give you the 4-bit outputs you want.

 

[sgharagoz]

Thanks for your input.

What I dont understand is that if you draw the FSM, 0110 is a state between the other two states, which means on the next clk cycle, the next state could be either 0011, or 1100!!!
Is there any way we could differentiate them?

 

[barry]

As I explained, you've really only got 3 states, regardless of what the outputs look like. If you've actually got a 4-bit state variable, then you will have 13 unused states. There is nothing intrinsically 'wrong' with this, assuming you account for these unused states. If you are creating an FPGA or ASIC your tools should be able to handle these unused states with no problem.