Could Vdd=Vds of FET.

[adnansiddiqui]

I have a voltage source of 28 V.Is it possible in biasing FET we place no resitor at drain and make Vds same as Vdd because I need Vds=28V. Or it will not work and not a general practice.Please tell me.

 

[Fom]

Usually when someone is talking about biasing he means Vgs not Vds.
I don't understand your question.

 

[adnansiddiqui]

I have to bias the FET at Vds=28 V.but the maximum supply limit is also 28 V.Therefore, I have to design biasing topology in such a way that no voltage drop before drain. Is it possible that I connect the supply directly to the drain to prevent voltage drop or it is not feasible.?

 

[rajharvijay]

In my opinion you may have but your device should have capabilities to handle that much electric field between drain and source.
this large electric field may damage your transistor.

 

[IBO]

U re quire a draimn resistance as rds of fet is small; shorting current. which destroys device.

 

[bageduke]

In my opinion you may have but your device should have capabilities to handle that much electric field between drain and source.
this large electric field may damage your transistor.

It could be okay since I have heard that some companies are using 60V power supply with several hundred um of gate length in regular cmos process.

 

[maharshi_qis]

i think tha voltage is too high so the elec field may b strong enough in destrying the device..