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continuous time sigma delta ADC

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kuohsi

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Is it necessary to place a D flip-flop(or latch) at the output of the comparator in continuous-time SDM??Why??
thanks!!:D
 

Yes, you want to transfer from time continous to time discrete. That need time discrimination. If you feed back the time continous comparator w/o a FF back to the input but using a FF for sampling the signal to the digital comb or reconstruction filter the FF is not representing the comparator. For instance the comparator could change sign twice a sampling period but the FF sees only one polarity.
 

Basically it's used to compensate the excess loop delay in a CT structure.
 

rfsystem said:
Yes, you want to transfer from time continous to time discrete. That need time discrimination. If you feed back the time continous comparator w/o a FF back to the input but using a FF for sampling the signal to the digital comb or reconstruction filter the FF is not representing the comparator. For instance the comparator could change sign twice a sampling period but the FF sees only one polarity.

What is the difference between D-FF and latch??
thanks a lot!!:D
 

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