Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

conjugate match and K factor

Status
Not open for further replies.

Lathas

Advanced Member level 4
Joined
Oct 16, 2012
Messages
118
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,298
Activity points
2,044
For a simultaneous conjugate match amplifier design, is it a necessary condition to have K>1, delta<1?
 

It is best when amplifier have k>1. But it is not always possible. Be aware that additional microstrip between grounding and device makes such amplifier behave almost as perfect oscillator, because S11 probably can obtain negative resistance (S11>1). For example, some 1mm on source of FET makes it oscillate in my case, osscilation power even increases when gate phase is matched (conjugate).
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top