A relaxation oscillator "comparator" could be as simple as
common-source NMOS (bottom) and PMOS (top) with
current source loads followed by inverters. If you are
not especially concerned with process variation.
Relaxation oscillators at higher frequencies, run up against
the limited discharge current (itself a very variable thing).
A symmetric triangle wave oscillator relieves this issue by
using (say) 2X up and 2X down currents (steered /
switched) rather than (say) 1X up, 100X down (to get
discharge dwell and its variability, minimized). 20MHz in
a 5V CMOS is getting up there for controlled-current
analog circuitry - I'd bet your cell library craps out below
200MHz and that's hard driven. So you need to look for
topologies that make it easy on the transistors.
I have to wonder just how important "linearity" (I presume,
f vs Ictrl) really is - a controlled oscillator usually being
part of a feedback system and control nonlinearity maybe
easily overcome by the loop gain? Be sure you understand
whether this is really a prime attribute, because it will tax
you quite a bit to achieve it (time, transistor count).