common source amplifiers CMOS !!!

[biolycans]

Hi all,

I am studying the common source amplifier CMOS with load resistances and current source as load too.

I don´t know How can I see the differences in output swings voltages between a NMOS common source and a PMOS common source. I found that the PMOS common source has a better output voltage swing. Is this correct ? Can you explain to me.

Thank you. Regards

Joaquin

 

[BradtheRad]

When talking about PMOS devices, the nomenclature is similar to PNP transistors. PNP has the emitter at the more positive terminal, even though it does not emit electrons. The convention is to say it emits holes.

The same thing is done when talking about P-devices. So, Source and Drain are the opposite of where they are for N-devices (even though the Source in a P-device is not supplying electrons, and the Drain is not removing electrons).

This allows us to use the same general terminology for transistors/mosfets. I guess it is easier this way, than it would be if we always had to clarify whether we were discussing source/drain for N-devices, or P-devices.

As for output voltage swing, it is greatest when you put the load in the collector (or drain) leg. This gives you greatest sensitivity. The collector is the more positive leg when we are using an NPN.

So we would put the load between the device and supply +, even though this does not seem the 'natural' position to put it. We may rather put the load in contact with zero ground, and if we want to do that we use a PNP.

This means you must rearrange components, when you compare NPN performance with PNP.

 

[SIDDHARTHA HAZRA]

For a resistive load CS amplifier:

For NMOS the swing is VDD > Vout > Id*Rd
For PMOS the swing is Id*Rd > Vout > VSS.

If the value of Id*Rd is exactly (VDD-VSS)/2 then swing in both NMOS and PMOS case is equal.

For a current source load CS amplifier:

Here in order to make the load work as a current source at all time it must be in saturation region. So the swing in case of current source load is determined by the saturation condition of the MOS.

For NMOS input with PMOS current source load the swing is VDD-Vdsatp > Vout > Vdsatn
For PMOS input with NMOS current source load the swing is VDD-Vdsatp > Vout > Vdsatn

Where, Vdsatp = Vsgp - Vthp and Vdsatn = Vgsn - Vthn