Common-emitter biasing on an IC

[james.smith]

Hi all,

New here, recently discovered the resource.

I have a question about biasing a common-emitter amplifier on-chip. I've done a good few audio amplifiers with op-amps or discrete transistors, and there a four-resistor network works well.

However, I've now started working with Cadence for M.Eng research, and I've been trying to get a simple CE amplifier designed. My question is, how does one bias it properly? I've got the Grey, Hurst, Lewis and Meyer book which I've completed, and it talks quite extensively about current sources and active loads, which I guess would be good to set the collector current, but how does one ensure that the transistor has the correct base-emitter voltage? Most of the book looks at such amplifiers from an ac perspective and omits biasing circuitry.

I've googled and searched library books but everyone seems to assume it's obvious and doesn't talk about it.

Thanks in advance for the help!
James

 

[BradtheRad]

The B-E range of operation is a few tenths of a volt. To turn on the transistor, it starts around 0.3 or 0.35 V.

If you apply greater than 0.65 or 0.7 V, then that means a lot of current is flowing through the base, and you will quickly ruin it.

If you put a resistance (or load) in the emitter leg, you must raise the bias voltage to overcome any rise in volt level at the emitter.

The above applies to NPN transistors. For PNP type, reverse the logic.

 

[xingkongwu]

hi
Maybe it is a good choice to provide an Ibe to get current of emmiter

 

[dick_freebird]

I prefer to think in terms of current, when it comes to BJT
circuits. This is a preference, theological arguments abound.
For a high frequency amplifier, a high impedance DC bias
bypassed with high quality C (emitter, and base coupling)
is probably the ticket.

 

[james.smith]

For a high frequency amplifier, a high impedance DC bias
bypassed with high quality C (emitter, and base coupling)
is probably the ticket.

Hi Dick,

Thanks for the suggestion. Could you perhaps point me to a diagram of what such a circuit would look like?

I understand what the bias voltages / currents need to be. The equations are in any microelectronics textbook... What confuses me is that most texts just put a "V_BIAS" sort of label at some point in the circuit and focus on the small-signal characteristics of the circuit. What I'm struggling with is what to use to put that bias voltage there without interfering with the RF parts of the circuit.

I've attached a picture of an approach that I've tried which has failed dismally, I've no idea why. I tried to design it to have a collector current of 1 mA but it ended up having about 8 mA while the base current was in the order of a few uA, I forget how many, which is strange since the Beta of the transistor should have been roughly 280. Is this basic design workable though? It could be that I've just made some errors in my design equations but I've no idea where to start looking...

Regards,
James