coding radix 2^2 sdf fft in verilog

[resh93]

Hi,

I need help understanding the single delay feedback fft architecture. I'm attempting to write a verilog code for radix 2^2 fft. I have gone through several papers but none of them have in depth explanation.

Please help

Thank you

 

[femirot2003]

i am having the same problem but i think this might a little bit, https://www.xionlogic.com/products/os/fft/r22sdf/
let me know the outcome when you are done.