Nurahmad
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Hi,
I want to simulate NMOS and PMOS noise behavior in 130nm technology with Mentor Graphics tool, parameters as below:
Vds=0.7V
Id=185uA
W/L=100/0.4 um
in order to get Id=185uA, Vgs has to be set around 0.36V. I put a AC voltage signal with offset 0.36V, magnitude default is 20mV.
The problem is, when I simulate AC noise behavior, my noise spectrum should be the ONOISE curve or the INOISE curve? (Should I take the drain net noise spectrum curve as my noise behavior of CMOS?)
From the images, the Onoise curve from drain net, while the Inoise from gate net.
I want to simulate NMOS and PMOS noise behavior in 130nm technology with Mentor Graphics tool, parameters as below:
Vds=0.7V
Id=185uA
W/L=100/0.4 um
in order to get Id=185uA, Vgs has to be set around 0.36V. I put a AC voltage signal with offset 0.36V, magnitude default is 20mV.
The problem is, when I simulate AC noise behavior, my noise spectrum should be the ONOISE curve or the INOISE curve? (Should I take the drain net noise spectrum curve as my noise behavior of CMOS?)
From the images, the Onoise curve from drain net, while the Inoise from gate net.
