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CMFB circuit design and simulation

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kevin_microelecrronic

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I have some qustions about CMFB ckt. I have a complete grasp on what the CMFB is and how to design it ,but I have some problems in connecting it to the main ckt. here it is : I design the main amplifier which is a fc one first ,when i connect the CMFB circuit which is a DDA CMFB the ouput level is pulled to the either of the vdd or gnd rail and also the gain of the main amp is degraded .fixing this problemes i have to change my main amplifier aspect ratios , other than (by altering the CMFB one ) it's overall gain drops to less than unity, but I've heard that we don't have to change the main amp parameters after connecting the CMFB .Now i want to know how to fix those problems. my other question is that the value is reported in papers as the main amplifier gain is the gain with CMFB or without it.
Also I've seen two methodes in papers in order to simulating the transient response of the CMFB ckt(applying ICMFB to the outputs or applying VCM step to the vref input of the CMFB) . but these two methodes give different responses and I want to know which one is correct and in which configuration do the CMFB and main amp have to be when we are simulating the step response or THD of the CMFB(unity gain closed-loopor open-loop). to make a long story short i want a complete testbench for simulating the step response and thd of the CMFB ckt in hspice.
thanks in advance for who cares about the above questions.
 

The common mode sensing resistors (if you are using resistors for sensing) should be larger than the impedance of the main amp, this will ensure that there is no loss in the differential gain of the main amp.
The reason for output getting stuck at vdd or gnd could be that it is in positive feedback (have to swap the inputs of CMFB amp to fix this) or if you are seeing output going to vdd in transient simulations, the loop s unstable (have to fix by compensation).
Did not understand why you would need to simulate for THD of CMFB. THD is done for main path. ICMFB and VCM both give an idea about the stability of the loop and should give same results (could be different if the ICMFB and VCM excitation amplitudes are different).
 

The common mode sensing resistors (if you are using resistors for sensing) should be larger than the impedance of the main amp, this will ensure that there is no loss in the differential gain of the main amp.
The reason for output getting stuck at vdd or gnd could be that it is in positive feedback (have to swap the inputs of CMFB amp to fix this) or if you are seeing output going to vdd in transient simulations, the loop s unstable (have to fix by compensation).
Did not understand why you would need to simulate for THD of CMFB. THD is done for main path. ICMFB and VCM both give an idea about the stability of the loop and should give same results (could be different if the ICMFB and VCM excitation amplitudes are different).

I mentioned that my CMFB is DDA ,so there is no need to resistors.and also the outputs both go to the high or low voltages simoltaneously(not necessary the vdd or gnd ) there is no difference between two outputs in common-mode operation . why do we need to swap the inputs?! when i change the size of my main amp devices it all works out and the outputs level is fixed at the middle and every thing works and the loop is stable . the output going to vdd is not the reason for the loop being unstable but if you mean the overshoots amplitude my overshoot amplitude is so amall around the vref and there is no ringing. my question was only about changing the sizes of main amp . and i just want to know do we allowed to do so after designing it? and if not what is the solution ? and second question was : what is the real gain of main amp? with CMFB or without it?
Also why do not simulate the thd of CMFB the linearity of CMFB is important.I've seen at the papers that they have reported the results of CMFB thd. For transient response the amplitude of ICMFB must be in an extent that would be able to provide the transition from 0v to vref at the outputs and so is the amplitude of the vref .but doing so gives diffrent values for settling time of CMFB . do we have to put the main or CMFB in unity-gain config?
 


I am wondering if anybody has ever performed the step response and linearity simulation for CMFB ? if so ,would you please give me an complete description about the configuration and signals which should be applied to the circuit (CMFB+main) for step response and linearity simulations of CMFB circuit (I've made my explanation more clear and complete at both of my two previous posts )
 

... description about the configuration and signals which should be applied to the circuit (CMFB+main) for step response and linearity simulations of CMFB circuit

In my eyes, the underlined string above is a contradictio in terminis (oxymoron), as the (step, ramp) input is given to the circuit (CMFB+main), so it can't be a step response and linearity simulations of CMFB circuit alone, as these 2 circuits cooperate in a closed loop.

Of course you can plot/measure the effect of the input stimulation at the CMFB output, but it doesn't say anything about the linearity of the CMFB itself nor of the total system.

So tell us, why would you want to measure the linearity of the CMFB itself?
 

In my eyes, the underlined string above is a contradictio in terminis (oxymoron), as the (step, ramp) input is given to the circuit (CMFB+main), so it can't be a step response and linearity simulations of CMFB circuit alone, as these 2 circuits cooperate in a closed loop.

Of course you can plot/measure the effect of the input stimulation at the CMFB output, but it doesn't say anything about the linearity of the CMFB itself nor of the total system.

So tell us, why would you want to measure the linearity of the CMFB itself?

I really do understand why you are saying , I want to know ,to what extent can the nonlinearity of the CMFB circuit affect the total linearity of the whole system? and my purpose of the step response simulation is to know how fast can the CMFB circuit response to the large common-mode voltage transients .but I don't know the exact and correct way by which the simulation should be done ,beause I'm getting different answers by the two above-mentioned methodes , both of which have utilized at the papers.
 

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