How ( if possible at all) can I multiply a clock in VHDL?
Say, the input global clock is 25MHz, and I need to get around 80MHz internal to synchronize with another external bus.
I've seen somewhere a circuit that performs multiplication by 2 using a FF and a gate or so.
You get a short pulse every edge of your input signal. Is that helpful?
I've seen somewhere a circuit that performs multiplication by 2 using a FF and a gate or so.
You get a short pulse every edge of your input signal. Is that helpful?
Right. You can't use HDL do do clock multiplication (being a description language). But you can use HDL to describe a circuit that can do that. As I said, a multiplication by 2 can be done, the resulting signal looks more like pulses but is twice the input frequency.
See this link:
**broken link removed**
Trick # 4
Or search the Xilinx website for "Non-Synchronous Circuit Tricks"
to Alexz, FPGA and CPLD are very close to each other interms of price, you can probably get cyclone I device for the same price, yes you will need additional software to boot up FPGA, but on positive side you will have more flixability of manipulating the clocks, also keep in mind if you need to do the upgrade on the field, it would be much easy to update FPGA instead of CPLD
to Alexz, FPGA and CPLD are very close to each other interms of price, you can probably get cyclone I device for the same price, yes you will need additional software to boot up FPGA, but on positive side you will have more flixability of manipulating the clocks, also keep in mind if you need to do the upgrade on the field, it would be much easy to update FPGA instead of CPLD
correct you need to boot them. you can generate *.rbf file and load it through SPI of the micro controller (I am assuming you have micro in your design)
But sometimes people using CPLD to store reset configuration word for the micro in CPLD, in this case use simple parallel latch with /OE to configure CPU, and than boot up FPGA
The MachXO is a small FPGA like the Altera MaxII, only the 2 larger size XO's (1200 and 2280 lut's) have 1 or 2 pll's (respectively). The XO's also have memory (distributed and Block) which the Altera folks don't. Price is the same.
Non-volatile
Single Chip solution (Flash on chip, boots into SRAM ~1ms)