Clock Keeper after tuning off the input clock

[fidobido]

If I have a clock signal at the input of a buffer and get the same clock signal at the output.

I need to keep the output clock signal for 2 or 3 cycles after turning off the input clock. How can I do that ?

 

[Golden Electronics]

1. Delay input cycle.
2. If input not then how u get output

 

[fidobido]

I need this clock at the output from the first cycle and even after turning off the input clock for 3 cycles.

The clock is variable and wide range ( from 10MHz till 800MHz) so I can't use fixed delay .

 

[crutschow]

That's a very strange requirement. What's the reason?

I don't see any easy way to do that. Perhaps there's a work-around.