I have I2C communication between my board(FPGA) and the embedded CPU.
To activate some load we need to write 14bit register to the FPGA.
I have 7 loads. Each load consume almost 1.2A.(I have 2A fuse )
I do it with H bridge topology on my circuit.
The switching duration is almost 100ms.
I want to write a code that will protect my circuit from activating 2 or more loads together.
I try to do it by comparing the new value with the old value and adding a delay. but i didn't succeed:sad:
I need your experience and your knowledge to give me some ideas how to make it work.
It´s not clear if you speak about FPGA (VHDL) code or microcontroller code.
(If VHDL...I wonder why you mentioned the microcontroller)
You need to decide (and describe) what happens when two or more loads ar activated at the same time.
Is there some priority for the loads? In a way that only the two loads with the higher priority are activated, while the others stay OFF.
Or - the easier case: don´t activate any load at all in case of more than two are tried to be activated.
there are a lot of cases to care about.
1 case: all OFF
7 cases: only one output activated
21 cases: with two outputs activated
99 cases: when more than two are activated
(128 in total)
Show what you have done so far. This shows your effort and motivates users to respond.
When Two or more loads will activate together the power consumption will be high and the fuse will be burn---> thus I want to activate only one load e
There is not priority for the loads.
"don´t activate any load at all in case of more than two are tried to be activated."
Its not easy for me...
I write down only the first two MSB of the loads register.
I put some notes in the relevant lines.
Code VHDL - [expand]
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IF(LOAD_STATUS(13DOWNTO12)/=LOAD_REG(13DOWNTO12))THEN------ FIRST 2 BIT OF THE REGISTER TO ACTIVATE THE LOAdCASE LOAD_REG(13DOWNTO12)ISWHEN"01"=>
LOAD1_OUT <="0101";------------ 2 H-bridges hence we have 4 bit registerWHEN"10"=>
LOAD1_OUT <="1001";WHEN"11"=>
LOAD1_OUT <="0110";WHENOTHERS=>
LOAD1_OUT <="0000";ENDCASE;
LOAD1_TIMER_EN <= '1';ELSIF LOAD_TIMER_END='1' THEN------- 100 ms counter for the load pulse. the counter in other process.
LOAD1_TIMER_EN <= '0';
LOAD1_OUT <="0000";ENDIF;
I´d use an ADDER to add all "1" in your register. If result >2 then there is an error.
Or a counter, that counts all "1" in oyur register.
You may start the ADDER or COUNTER after a new value is written to the register.
14 bits, each bit has the value of "1" (not 2, 4, 8, 16...)
If i understood u suggest to add adder of '1' and compare it to each bit of the register load..?
It will be very tedious8-O
Result >2?
Sorry i didn't understand...
If I add each bit 1 it never could be greater from 2(max 2)
One more things, counter for '1'-es, case statement will be the best way to do it..? (need 14 clks for that, I have 50MHz clk on board)
I have 14 bit register( 7 loads, 2 bit for each load).
Supposed i will write 0x0005 it's meaning i will activate 2 loads, and i have 2 "ones".
In this situation my VHDL code will not enable the output because counter >2 means erro.
But we have 0x0003 situation ("0110" output see the code above) also we have 2 "ones" and here we can and most to enable the output.
Supposed i will write 0x0005 it's meaning i will activate 2 loads, and i have 2 "ones".
In this situation my VHDL code will not enable the output because counter >2 means erro.