Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Chips get a burned spot in the test?

Status
Not open for further replies.

thomas00

Newbie level 4
Joined
Nov 26, 2010
Messages
6
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Activity points
1,343
Chips draw an abnormal large current and got a burned spot in the test?

During my tset of an ASIC with several circuits on it, I found out that the chip often directly starts to draw a very large current after turning on the power. And the socket and the chip got extremly hot and I clearly saw a small burned spot even on the package of the chip itself.This does not always happen, but it happens quite often. Sometimes during the normal measurement, after I changed cables and switched the supplies, somehow this problem suddenly appears.

Almost all the chips have this problem either at the very beginning of the test or after testing it for a while. And the burned spots are all at exactly the same place of the package. So I suppose one part of a certain circuit gets abnormal large current and is destroyed and generates lots of heat.

Now my question is, why does it happen?
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top