How to solve mapping errors in Design compiler synthesis
--------- Sanity Check on TLUPlus Files -------------
Info: Found HALF_NODE_SCALE_FACTOR 0.900000 in TLUPlus files.
1. Checking the conducting layer names in ITF and mapping file ...
Error: Layer "M1" (metal1) exists in the MW-tech but not in the mapping AND ITF file. (TLUP-001)
Error: Layer "M2" (metal2) exists in the MW-tech but not in the mapping AND ITF file. (TLUP-001)
Error: Layer "M3" (metal3) exists in the MW-tech but not in the mapping AND ITF file. (TLUP-001)
Error: Layer "M4" (metal4) exists in the MW-tech but not in the mapping AND ITF file. (TLUP-001)
Error: Layer "M5" (metal5) exists in the MW-tech but not in the mapping AND ITF file. (TLUP-001)
Error: Layer "M6" (metal6) exists in the MW-tech but not in the mapping AND ITF file. (TLUP-001)
Error: Layer "AP" (metal7) exists in the MW-tech but not in the mapping AND ITF file. (TLUP-001)
----------------- Check Ends ------------------
You may need to track down the mappings described in the mapping file (the file specified for the -tech2itf_map option to the set_tlu_plus_files command).
Also read the man-page for the TLUP-001 message for more info and suggestions.
If all of these files came from a library vendor, you might need to have them help you.