Hi, I found that my simulation runs faster when I put `celldefine macro in big RTL sub-block or simulation models. Now, says I use `celldefine macro in my RTL sub-block INSTANT_1:
1. I am assuming by using `celldefine macro, the simulation use less memory as it now treats INSTANT_1 as a cell, and does not keep the details inside INSTANT_1 . Is this assumption correct?
2. I am aware that I will not be able to show the waveform of signal inside & of ports of INSTANT_1 after it is treated as a cell. Is there any other impact that I should be aware of?
side note: depending on the size of system I am simulating, this method sometimes reduces really huge amount of simulation runtime, says from 30mins --> 5mins!!
Thanks.