Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Cascaded 555 timer IC output

Status
Not open for further replies.

ravi2024

Newbie level 6
Joined
Jul 7, 2013
Messages
11
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
94
Hi,


I was trying to simulate a cascaded double stage 555 timer IC ckt. The motto was to get two voltage o/p displaced in time. But the voltage pulse at second stage output is vary less. I am using a 10 V battery as the source and the first output voltage pulse is around 9.6 V but the output voltage pulse is only 1.4 volts. Could anyone tell me why so or where is the fault? I have attached the ckt and the output plot.
 

Attachments

  • Untitled.png
    Untitled.png
    32.6 KB · Views: 84
  • Untitled1.png
    Untitled1.png
    111.3 KB · Views: 73

50 ohms is indeed way too low a load value for a 555. It would attempt to put out 200 mA.

If you cannot use a larger load resistor, buffer it with an emitter follower. Any general purpose NPN transistor will do
 

Well, I shall be thankful if picture or final design diagram is shared. Regards
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top