Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Cascade CMOS voltage doubler output does not increase

Status
Not open for further replies.

millinium

Junior Member level 1
Junior Member level 1
Joined
Oct 5, 2013
Messages
15
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Location
Iligan city
Visit site
Activity points
96
Anyone knows why the output of the voltage doubler doesn't increase even though i cascade it up to 3rd stage?..Tnx for any answer. i attach the circuit of the 1st stage voltage doubler with its simulated output.
 

Attachments

  • Screenshot.png
    Screenshot.png
    71.4 KB · Views: 115
  • Screenshot-1.png
    Screenshot-1.png
    90.9 KB · Views: 101

there is no problem when using a single stage..but when i tried cascading it the output remains the same..anybody knows how to solve this problem?
 
Last edited:

i cascaded it in such a way that the output of the first stage is the input of the 2nd stage and soon..the clock is equal to all stages..btw, the values of the component in the 2nd stage is the same in the 1st stage..tnx for the reply
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top